|
Processor |
|
Processor Core IccMax |
32.000A
(1.000 - 4294967294.000A)
|
|
Reference Clock |
100.000MHz
(100.000 - 100.000MHz)
|
|
Processor.Turbo.VoltageOverride |
|
Processor Core 0 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor Core 1 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor Core 2 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor Core 3 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor Core 4 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor Core 5 Voltage Override |
0.000V
(0.000 - 2.000V)
|
|
Processor.Turbo.VoltageOffset |
|
Processor Core 0 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor Core 1 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor Core 2 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor Core 3 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor Core 4 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor Core 5 Voltage Offset |
0.000mV
(-1.000 - 0.998mV)
|
|
Processor.Turbo.VoltageMode |
|
Processor Core 0 Voltage Mode |
Adaptive
|
|
Processor Core 1 Voltage Mode |
Adaptive
|
|
Processor Core 2 Voltage Mode |
Adaptive
|
|
Processor Core 3 Voltage Mode |
Adaptive
|
|
Processor Core 4 Voltage Mode |
Adaptive
|
|
Processor Core 5 Voltage Mode |
Adaptive
|
|
Processor.Turbo.Ratios |
|
1 Active Core |
44x
(26 - 128x)
|
|
2 Active Cores |
44x
(26 - 128x)
|
|
3 Active Cores |
43x
(26 - 128x)
|
|
4 Active Cores |
43x
(26 - 128x)
|
|
5 Active Cores |
42x
(26 - 128x)
|
|
6 Active Cores |
42x
(26 - 128x)
|
|
Processor.Turbo.RatioLimit |
|
Core 0 |
44x
(26 - 128x)
|
|
Core 1 |
44x
(26 - 128x)
|
|
Core 2 |
44x
(26 - 128x)
|
|
Core 3 |
44x
(26 - 128x)
|
|
Core 4 |
44x
(26 - 128x)
|
|
Core 5 |
44x
(26 - 128x)
|
|
Processor.Turbo |
|
Processor.PowerCurrent |
|
Turbo Boost Power Max |
65.000W
(1.000 - 4095.875W)
|
|
Turbo Boost Power Time Window |
28Seconds
(1 - 128Seconds)
|
|
Turbo Boost Short Power Max |
115.000W
(1.000 - 4095.875W)
|
|
Turbo Boost Short Power Max Enable |
Enable
|
|
RealTimeMemory.Timings |
|
tCKE |
Default
(Default - 15.0)
|
|
tCWL |
Default
(Default - 20.0)
|
|
tFAW |
Default
(Default - 63.0)
|
|
tRAS |
64.0
(Default - 64.0)
|
|
tRDRD_dd |
Default
(Default - 54.0)
|
|
tRDRD_dg |
Default
(Default - 54.0)
|
|
tRDRD_dr |
Default
(Default - 54.0)
|
|
tRDRD_sg |
Default
(Default - 54.0)
|
|
tRDWR_dd |
Default
(Default - 54.0)
|
|
tRDWR_dg |
Default
(Default - 54.0)
|
|
tRDWR_dr |
Default
(Default - 54.0)
|
|
tRDWR_sg |
Default
(Default - 54.0)
|
|
tREFI |
32896.0
(Default - 65535.0)
|
|
tRP |
Default
(Default - 63.0)
|
|
tRRD_dg |
4.0
(Default - 15.0)
|
|
tRRD_sg |
Default
(Default - 15.0)
|
|
tWRRD_dd |
Default
(Default - 54.0)
|
|
tWRRD_dg |
Default
(Default - 54.0)
|
|
tWRRD_dr |
Default
(Default - 54.0)
|
|
tWRWR_dd |
Default
(Default - 54.0)
|
|
tWRWR_dg |
Default
(Default - 54.0)
|
|
tWRWR_dr |
Default
(Default - 54.0)
|
|
tWRWR_sg |
Default
(Default - 54.0)
|
|
Other |
|
System Agent IccMax |
32.000A
(1.000 - 4294967294.000A)
|
|
Cache |
|
Cache IccMax |
32.000A
(1.000 - 4294967294.000A)
|
