|
Processor |
|
Core Voltage |
DefaultV
(Default - 2.000V)
|
|
Core Voltage Offset |
0mV
(-1 - 1mV)
|
|
Processor Core IccMax |
193.000A
(1.000 - 255.750A)
|
|
Reference Clock |
100.000MHz
(97.500 - 538.200MHz)
|
|
Core Voltage Mode |
Adaptive
|
|
Processor.Turbo.Ratios |
|
1 Active Core |
41x
(8 - 41x)
|
|
2 Active Cores |
40x
(8 - 41x)
|
|
3 Active Cores |
40x
(8 - 41x)
|
|
4 Active Cores |
40x
(8 - 41x)
|
|
5 Active Cores |
39x
(8 - 41x)
|
|
6 Active Cores |
39x
(8 - 41x)
|
|
Processor.Turbo.RatioLimit |
|
Core 0 |
41x
(8 - 41x)
|
|
Core 1 |
41x
(8 - 41x)
|
|
Core 2 |
41x
(8 - 41x)
|
|
Core 3 |
41x
(8 - 41x)
|
|
Core 4 |
41x
(8 - 41x)
|
|
Core 5 |
41x
(8 - 41x)
|
|
Processor.Turbo |
|
Processor.PowerCurrent |
|
Turbo Boost Power Max |
255.000W
(1.000 - 4095.875W)
|
|
Turbo Boost Power Time Window |
28Seconds
(1 - 128Seconds)
|
|
Turbo Boost Short Power Max |
255.000W
(1.000 - 4095.875W)
|
|
Turbo Boost Short Power Max Enable |
Enable
|
|
RealTimeMemory.Timings |
|
tCKE |
6.0
(4.0 - 15.0)
|
|
tCWL |
13.0
(4.0 - 20.0)
|
|
tFAW |
25.0
(16.0 - 63.0)
|
|
tRAS |
36.0
(28.0 - 64.0)
|
|
tRDRD_dd |
7.0
(4.0 - 54.0)
|
|
tRDRD_dg |
4.0
(4.0 - 54.0)
|
|
tRDRD_dr |
6.0
(4.0 - 54.0)
|
|
tRDRD_sg |
6.0
(4.0 - 54.0)
|
|
tRDWR_dd |
11.0
(4.0 - 54.0)
|
|
tRDWR_dg |
9.0
(4.0 - 54.0)
|
|
tRDWR_dr |
9.0
(4.0 - 54.0)
|
|
tRDWR_sg |
9.0
(4.0 - 54.0)
|
|
tREFI |
8316.0
(2000.0 - 65535.0)
|
|
tRP |
15.0
(8.0 - 63.0)
|
|
tRRD_dg |
4.0
(4.0 - 15.0)
|
|
tRRD_sg |
6.0
(4.0 - 15.0)
|
|
tWRRD_dd |
6.0
(4.0 - 54.0)
|
|
tWRRD_dg |
22.0
(4.0 - 54.0)
|
|
tWRRD_dr |
5.0
(4.0 - 54.0)
|
|
tWRRD_sg |
27.0
(4.0 - 86.0)
|
|
tWRWR_dd |
7.0
(4.0 - 54.0)
|
|
tWRWR_dg |
4.0
(4.0 - 54.0)
|
|
tWRWR_dr |
7.0
(4.0 - 54.0)
|
|
tWRWR_sg |
6.0
(4.0 - 54.0)
|
|
Cache |
|
Cache IccMax |
193.000A
(1.000 - 255.750A)
|
|
Cache Voltage |
DefaultV
(Default - 2.000V)
|
|
Cache Voltage Offset |
0mV
(-1 - 1mV)
|
|
Cache Voltage Mode |
Adaptive
|
