With Intel already using triple channel and soon quad channel memory, there's not that much need for high frequency (= high bandwidth) anymore. A bit 'weird' then that DDR4 seems to be all about increasing the frequency rather than reducing the latencies.
At a recent MemCon conference in Tokyo, Japan, Bill Gervasi, vice president of engineering at US Modular and a member of the JEDEC board of directors, revealed that the target effective clock-speeds for DDR4 memory would be 2133MHz - 4266MHz, an increase from previously discussed frequencies. Apparently, JEDEC and memory manufacturers decided that the progress of DDR3 leaves no space for DDR4 data rates below 2133Mb/s.
The designers of DDR4 memory are looking forward 1.2V and 1.1V voltage settings for the new memory type and are even considering 1.05V option to greatly reduce power consumption of the forthcoming systems. It is expected that manufacturers of dynamic random access memory (DRAM) will have to use advanced fabrication technology to make the DDR4 chips. The first chips are likely to be made using 32nm or 36nm process technologies.
At present JEDEC expects to finalize the DDR4 specification in 2011 and start commercial production in 2012. Actual mass transition to the next-generation memory is projected to occur towards 2015.