Intel Replaces ‘Tick-Tock’ with ‘Process-Architecture-Optimization’

Intel’s aggressive approach to processor design and manufacturing has been largely unrivalled in the last decade and a half. The ‘Tick-Tock’ cadence that it has implemented in the last decade especially has seen it steam ahead at the front of the CPU performance race. News is surfacing today that indicate that such a rapid pace will not be sustainable in the years to come as the company battles with issues related to its forthcoming 10nm manufacturing process.

Almost annually, each Tick represented a new lithographic process, while each Tock arrived as a new and improved architecture. This was a strategy that kept performance moving in the right direction with each subsequent product launch and kept alive (in principle at least) the mystical notion of ‘Moore’s Law’ and ever increasing efficiency and performance. The move to 14nm process technology took longer than previous ‘Tick’ product refreshes, and as expected the next generation of 10nm processors, code-named Cannonlake has already seen delays and is now expected until possible Q3 2017. Today Intel as officially acknowledged a new, three step cadence described as ‘Process-Architecture-Optimization’. According to an Intel report;

"We expect to lengthen the amount of time we will utilize out 14 [nanometer] and out next-generation 10 [nanometer] process technologies, further optimizing out products and process technologies while meeting the yearly market cadence for product introductions."

While we will have to wait a little longer for Intel to master the arts of 10nm process manufacturing, you can sure that they will get there ahead of the competition, such is their dominance in the area silicon manufacturing and their relentless investment in their own fabs around the world. For now however, there will be no more ‘Tick-Tock’.

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