RealTimeMemory
|
tCKE
|
8
(4 - 15)
|
tFAW
|
33
(16 - 63)
|
tRAS
|
35
(28 - 64)
|
tRDRD_dd
|
6
(4 - 54)
|
tRDRD_dg
|
4
(4 - 54)
|
tRDRD_dr
|
7
(4 - 54)
|
tRDRD_sg
|
7
(4 - 54)
|
tRDWR_dd
|
13
(4 - 54)
|
tRDWR_dg
|
11
(4 - 54)
|
tRDWR_dr
|
12
(4 - 54)
|
tRDWR_sg
|
12
(4 - 54)
|
tREFI
|
11700
(2000 - 65535)
|
tRFC
|
525
(90 - 1020)
|
tRP
|
17
(8 - 63)
|
tRRD_dg
|
6
(4 - 15)
|
tRRD_sg
|
8
(4 - 15)
|
tWRRD_dd
|
4
(4 - 54)
|
tWRRD_dg
|
23
(4 - 54)
|
tWRRD_dr
|
5
(4 - 54)
|
tWRRD_sg
|
29
(4 - 86)
|
tWRWR_dd
|
9
(4 - 54)
|
tWRWR_dg
|
4
(4 - 54)
|
tWRWR_dr
|
9
(4 - 54)
|
tWRWR_sg
|
7
(4 - 54)
|
Processor
|
AVX Ratio Offset
|
0 x
(0 - 31 x)
|
Core Voltage
|
Default V
(Default - 4294967295.000 V)
|
Core Voltage Offset
|
0 mV
(-1 - 4294967295 mV)
|
Processor Core IccMax
|
255.00 A
(1.00 - 255.75 A)
|
Processor Core Ratio
|
54 x
(8 - 83 x)
|
Reference Clock
|
100.0 MHz
(98.0 - 538.2 MHz)
|
Core Voltage Mode
|
Adaptive
|
Processor.Turbo.Ratios
|
1 Active Core
|
54 x
(8 - 83 x)
|
2 Active Cores
|
54 x
(8 - 83 x)
|
3 Active Cores
|
54 x
(8 - 83 x)
|
4 Active Cores
|
54 x
(8 - 83 x)
|
5 Active Cores
|
54 x
(8 - 83 x)
|
6 Active Cores
|
54 x
(8 - 83 x)
|
Processor.Turbo.RatioLimit
|
Core 0
|
83 x
(8 - 83 x)
|
Core 1
|
83 x
(8 - 83 x)
|
Core 2
|
83 x
(8 - 83 x)
|
Core 3
|
83 x
(8 - 83 x)
|
Core 4
|
83 x
(8 - 83 x)
|
Core 5
|
83 x
(8 - 83 x)
|
Processor.Turbo
|
Processor.PowerCurrent
|
Turbo Boost Power Max
|
4095.875 W
(1.000 - 4095.875 W)
|
Turbo Boost Power Time Window
|
8.000 Seconds
(0.250 - 96.000 Seconds)
|
Turbo Boost Short Power Max
|
4095.875 W
(1.000 - 4095.875 W)
|
Package Turbo Power Lock
|
0
|
Turbo Boost Short Power Max Enable
|
1
|
Cache
|
Cache IccMax
|
255.00 A
(1.00 - 255.75 A)
|
Cache Voltage
|
Default V
(Default - 2.000 V)
|
Cache Voltage Offset
|
0 mV
(-1 - 1 mV)
|
Processor Cache Ratio
|
50 x
(8 - 83 x)
|
Cache Voltage Mode
|
0
|