Intel Haswell Overclocking Fully Disclosed - Theory For Core i7 4770K!

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Belgium Massman says:

You can download the .pdf slides as shown at IDF here: https://intel.activeevents.com/bj13/scheduler/catalog.do (just search for "overclocking"). There's a bunch of other interesting material there as well.

All the information in this article should be public knowledge, no NDAs broken.

India sumonpathak says:

link has a small typo...

Germany der8auer says:

Thanks for all that information PJ!

Indonesia LSlowmotion says:

thanks a lot! :D

NoMS says:

If BCLK OC means that the times of fun overclockable cheap chips (Haswell based Celeron's/Pentium's) like the ones of "775 era" is back, the only thing I have to say about this platform is:




:D

Belgium leeghoofd says:

Why do we get tips to bench Ivy ? so confused by this...

United States Splave.ROM says:

NoM$_YesLinux said: If BCLK OC means that the times of fun overclockable cheap chips (Haswell based Celeron's/Pentium's) like the ones of "775 era" is back, the only thing I have to say about this platform is:




:D


there are probably steps like x79 100, 125, etc for the bclk and they might not be as flexible straying away from those steps. I assume they would lock that down on cheap chips..just conjecture though :)

NoMS says:

Splave said: there are probably steps like x79 100, 125, etc for the bclk and they might not be as flexible straying away from those steps. I assume they would lock that down on cheap chips..just conjecture though :)


Sure, but it's always better than actual 100+/-10% BCLK OC that we have with 1155 Sandy/Ivy and that would make the cheap chips oc able. But being somewhat realistic, I don't expect to see Intel allowing BCLK OC on these cheap chips too...:(

But well... The hope is the last thing to die! :D

Germany der8auer says:

I guess only the K-suffix CPUs will have the option to change the bclk.

TaPaKaH says:

overclockable or not, low-end CPUs are only good for hardware points

Belgium Massman says:

Overclocking has become just another product feature that Intel can charge for. Just like - hyperthreading - amount of cores - amount of cache - type of IGP - virtualisation - dram ratios And so on. There has been no confirmed (or leaked) product information regarding the correct configuration of the SKUs, just guesses, so we can only make assumptions here. But it seems fairly obvious that the non K-sku processors will not have the option to play with PEG:DMI (bclk gear ratio) settings.

United States Bobnova says:

The 3820 has gear ratios despite being a non-K, so some of 'em might. Almost certainly not the low end stuff though.

Belgium Massman says:

Bobnova said: The 3820 has gear ratios despite being a non-K, so some of 'em might. Almost certainly not the low end stuff though.


Hah, same response I had :D.

I was made aware of the fact that the Core i7 3820 was part of the most high-end desktop platform and that Haswell is a replacement for the mainstream platform. Between the lines, it probably meant that all non-K sku CPUs built for a high-end X-chipset will have additional overclocking options compared those for a mainstream Z-chipset.

Greece crustytheclown says:

thanks for the info Peter

Germany websmile says:

Interesting info, thanks for sharing, PJ - maybe decision to skip Haswell was made bit too soon :D

FlanK3r says:

K-CPUs, better binned :)

Poland G.Foyle says:

IDF 2012 docs say that L3 cache is on ring frequency and power domain. IDF2013 China docs say L3 is on core domain. I think the former is correct?

BTW, what you call eDRAM is not on-die (it's a separate die on the same package), also the small e for embedded is not exactly correct, since it's a separate die :)

FlanK3r says:

but.. I thought eDRAM will be only mobile CPUs (GT3), or not?

Belgium Massman says:

xoqolatl said: IDF 2012 docs say that L3 cache is on ring frequency and power domain. IDF2013 China docs say L3 is on core domain. I think the former is correct?

BTW, what you call eDRAM is not on-die (it's a separate die on the same package), also the small e for embedded is not exactly correct, since it's a separate die :)


Thanks for the corrections. L3 must be on Ring frequency as it's shared between all cores.

There wasn't that much information on the eDRAM - even behind-the-scenes. All the info we got was "additional cache", "in-house design" and "super dooper fast".

United States Bobnova says:

SB/IB the L3 runs at core speed, doesn't it? It could be anywhere!

United States Splave.ROM says:

200 BCLK ftw

Belgium Massman says:

Shhht :p

Puerto Rico chispy says:

Very nice article , thanks for sharing Pieter.

Italy Gigioracing says:

8 gigahertz cpu !!!

Belgium Massman says:

gigioracing said: 8 gigahertz cpu !!!


No.

United States Splave.ROM says:

6.7ghz ftw! so about 7.1 - 7.2 ish ivy speed 32m/PF I hope :D

Hiwa says:

everyone will bench pedro benchmark again.

Belgium leeghoofd says:

and AM3 Hiwa, bandwith whores !!!

Croatia stasio says:

Splave said: 200 BCLK ftw





Btw,
CPU-Z 1.64 display CPU VRM voltage,instead of CPU Vcore.

Belgium Massman says:

Oh, only 188MHz ?

Croatia stasio says:

Massman said: Oh, only 188MHz ?

Published........atm.

United States xxbassplayerxx says:

For some reason BCLK close to 200 just seems right... 1366 days :)

Belgium Massman says:

Wonder who'll get the 2.5x gear ratio working :)

Denmark zzolio says:

I never got it to work on X79

Belgium Massman says:

That's because the CPUs were just not capable of running anything near that :). Maybe they are now ... not sure about this, actually.

Denmark zzolio says:

16*250=4000 should have been working

Belgium Massman says:

The CPUs were just not capable of doing much more than 170MHz BCLK. To fully use the 2.5x ratio, you'd need to use a BCLK of 68MHz with 2.5x gear ratio. Anything below 95MHz BCLK on SB-E was already a struggle.

United States sin0822 says:

yea but you thin you can run the PCI-E less than 90mhz?

Netherlands rsnubje says:

It's possible for Haswell to go below 90 bclk.

United States sin0822 says:

but can the PCi-E bus itself not the CPU, i am talking about the GPU go below? Maybe, idk. I have one GPu i used to do that 117mh BCLK, so i guess you can go the other direction, but i always felt it could go up more than down.

Germany Hyperhorn says:

Any new thoughts about "is L3 cache running at core or ring frequency" thing? What would you guys think if core AND ring frequency boost L3 cache performance at a 2/3 (core) and 1/3 (ring) relationship? Wouldn't it be a nice idea that L3-cache runs at core frequency and ringbus only boosts the interface between the cores and the L3-cache? Given L3-cache and ring share one clock domain in fact and run at the same frequency - for what reasons would the core frequency affect synthetic L3 performance values much more than the ring frequency or e. g. CPU NB clock frequency of AMD CPUs?

Belgium Massman says:

If I recall the IDF presentation correctly, the Intel engineers mentioned that "even though the Ring Bus frequency can be adjusted, they have not seen major performance gains in the labs". And then they asked the reviewers and power users to test it themselves :D

Romania Alex@ro says:

Aside from superpi and couple of 2d benchmarks+2001,gains are not so big as you'd expect to,pretty much below 5%....

Austria basco says:

can someone plz advise me how to play with rtl-settings on maximus? if i change one setting one step up or down i get 55 no matter what volts.... i get non consistent rtl=changes after reboots on auto and i think this is only setting effecting 3d11mark pysx score.(maybe interesting for massman in x79 pysx). thanks in advance

Poland Xtreme Addict says:

lower bclk for instance to 98,6 mhz and try to boot, you have to pass memory training first before going full mhz

Kazakhstan TerraRaptor says:

Bascom my way to adjust RTLs @M6E is as follows: 1. Set all RTLs & RTL-IOs to desired values iat the same time. (eg. 39/39/40/40 4/4/4/4 - do not change only one parameter). 2. Start adjusting RTL initial value in small steps from 63 to smth like 40 (63, 61, 59 etc) trying to post/train with a given RTL initial value. For my PSC kit @2600 I was able to adjust rtls from 42/42/47/45 4/4/9/7 to 41/41/42/42 4/4/4/4 with RTL initial value of 44. I beleive RTL initial value is a key for successful post.

Austria basco says:

thx very much xtreme addict.
its better then before now,but i am still not able to put values manuell.
best score i get is with 39\40\40\41 and this is only sometimes after boots if i am lucky
only rtl initial value i can do manuell.

does more ramvolt help you with lower rtl?-me is not getting lower values.

thx terraraptor-will try and report.

ex:my last 3 boots on rtl-auto:39\39\40\41 ; 39\39\40\40 : 39\40\41\40

my sys:max6gene 1002-17600cl7 pi-1:9 2424mhz cl8-11-8

Austria basco says:

thanks a lot Terraraptor & Xtremeaddict
with your help i can finally boot with manuell rtl.
2424mhz rtlinit-44 \ 39\39\40\40

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